1. Field of the Invention
The present invention relates to a display device and a method of fabricating a display device, and more particularly, to a liquid crystal display (LCD) device and a method of fabricating an LCD device.
2. Description of the Related Art
As the need for visual display devices increases, requirements for improved display devices having low power consumption, thin profiles, light weight, and high image quality have increased. Since operational characteristics of LCD devices satisfy these requirements and are suitable for mass-production, various new LCD devices are being developed. Accordingly, LCD devices are gradually replacing cathode ray tube (CRT) devices.
In general, LCD devices display images by adjusting light transmittance ratios of liquid crystal cells by respectively supplying data signals according to image information to the liquid crystal cells arranged as a matrix configuration. Accordingly, an LCD device includes a color filter substrate, an array substrate, and a liquid crystal material layer formed between the color filter and array substrates. In addition, a thin film transistor (TFT) is commonly used as a switching device of the LCD device, wherein a channel layer of the TFT includes one of an amorphous silicon thin film or a polycrystalline silicon thin film.
During fabrication of the LCD device, a relatively large number of mask processes (i.e., photolithographic processes) are required to fabricate the array substrate, including the TFTs. Accordingly, reducing the number of mask processes will improve productivity and reduce manufacturing costs.
FIG. 1 is a plan view of an array substrate of an LCD device according to the related art. In FIG. 1, a plurality of gate lines 16 and data lines 17 are arranged along horizontal and vertical directions, respectively, on an array substrate 10 to define a plurality of pixel regions. In addition, a TFT is formed at each crossing region of the gate and data lines 16 and 17, and a pixel electrode 18 is formed at each of the pixel regions. The TFT is composed of a gate electrode 21 connected to the gate line 16, a source electrode 22 connected to the data line 17, and a drain electrode 23 connected to the pixel electrode 18. Although not shown, the TFT includes first and second insulating layers for insulating the gate electrode 21 and the source/drain electrodes 22 and 23. In addition, the TFT includes an active layer 24 for forming a conductive channel between the source electrode 22 and the drain electrode 23 by a gate voltage supplied to the gate electrode 21.
In FIG. 1, the source electrode 22 is electrically connected to a source region of the active layer 24 through a first contact hole 40a formed on the insulating layers (not shown), and the drain electrode 23 is electrically connected to a drain region of the active layer 24 through the first contact hole 40a. Although not shown, a third insulating layer is provided with a second contact hole 40b and is formed on the drain electrode 23 so that the drain electrode 23 and the pixel electrode 18 are electrically interconnected to each other through the second contact hole 40b. 
FIGS. 2A to 2F are cross sectional views along I–I′ of FIG. 1 of fabrication processes for the LCD according to the related art device. In FIG. 2A, an active pattern 24 composed of a polycrystalline silicon layer is formed on the substrate 10 using a photolithographic process.
In FIG. 2B, a first insulating layer 15a and a conductive metal layer are sequentially deposited along an entire surface of the substrate 10 where the active pattern 24 is formed. Then, the conductive metal material is patterned by using a photolithographic process, thereby forming a gate electrode 21 on the active pattern 24 with the first insulating layer 15a disposed therebetween. Then, a high concentration of impurity ions are injected into predetermined regions of the active pattern 24 using the gate electrode 21 as a mask, thereby forming p+ or n+ type source/drain regions 24a and 24b. 
In FIG. 2C, a second insulating layer 15b is deposited along an entire surface of the substrate 10 where the gate electrode 21 is formed. Then, the second and first insulating layers 15b and 15a are partially removed by a photolithographic process, thereby forming first contact holes 40a that partially expose the source/drain regions 24a and 24b. 
In FIG. 2D, a conductive metal material is deposited along an entire surface of the substrate 10 and a photolithographic process is performed, thereby forming a source electrode 22 connected to the source region 24a and a drain electrode 23 connected to the drain region 24b through the first contact hole 40a. In addition, a portion of the conductive metal layer constituting the source electrode 22 extends along one direction to constitute a data line 17.
In FIG. 2E, a third insulating layer 15c is deposited along an entire surface of the substrate 10, and a second contact hole 40b is formed by a photolithographic process to expose a portion of the drain electrode 23.
In FIG. 2F, a transparent conductive material is deposited along an entire surface of the substrate 10 where the third insulating layer 15c is formed, and a pixel electrode 18 is formed by a photolithographic process to be connected to the drain electrode 23 through the second contact hole 40b. 
During fabrication of the polycrystalline silicon TFT (poly-TFT) of the LCD device, at least six separate photolithographic processes are required to pattern the active pattern, the gate electrode, the first contact hole, the source/drain electrode, the second contact hole, and the pixel electrode. Each of the photolithographic processes includes a series of processes for forming a desired pattern by transferring a pattern formed on a mask onto a substrate where a thin film is deposited, a plurality of processes including photoresist deposition, light exposure, and development processes. Accordingly, these photolithographic processes lower production yield and may create defects during formation of the TFT. In addition, since patterning masks are very expensive, as the number of patterning masks increases, fabrication costs proportionally increase.